Abstract: The state of the art for hardware security verification relies heavily on manual inspection, code review, and functional verification techniques to identify security vulnerabilities. This labor-intensive process doesn’t scale, significantly reduces productivity, and provides no assurance that a security flaw will be found. Maintaining the status quo leaves hardware vulnerable to attacks exploiting hardware, firmware, and software weaknesses.

This presentation describes a framework for scalable hardware security verification. The methods focus on information flow tracking and include static analysis, simulation/emulation, and formal verification. The presentation discusses the challenges in hardware security verification, including developing and refining properties, creating security metrics, understanding vulnerabilities, debugging potential security flaws, and scaling to industry designs. The talk highlights our security verification efforts on the Caliptra and OpenTitan hardware roots of trust.

Ryan Kastner is a professor in the Department of Computer Science and Engineering at UC San Diego, where he holds the William Nachbar endowed chair. He received a Ph.D. in Computer Science at UCLA, a Master’s degree (MS) in engineering, and Bachelor’s degrees (BS) in Electrical Engineering and Computer Engineering, all from Northwestern University. He leads the Kastner Research Group whose current research interests fall into three areas: hardware acceleration, hardware security, and remote sensing. He is the co-director of the Wireless Embedded Systems Master of Advanced Studies Program. He also co-directs the Engineers for Exploration Program. He is the co-founder of Cycuity, which develops hardware security verification solutions. He is an IEEE Fellow.